Field of the Invention
The present invention relates to a silicon carbide semiconductor device, in particular, a silicon carbide semiconductor device having a trench.
Description of the Background Art
Japanese Patent Laying-Open No. 7-326755 discloses a trench gate type MOSFET (Metal Oxide Semiconductor Field Effect Transistor) employing a silicon carbide substrate. This patent publication describes that a gate thermal oxidation film has a thicker film thickness on a bottom surface of a trench than the film thickness thereof on a side surface of the trench, so that a threshold voltage becomes low and breakdown voltage between the gate and the drain becomes high. It is also described that the bottom surface of the trench corresponds to a carbon plane, which allows for fast oxidation rate, of hexagonal single-crystal silicon carbide, whereas the side surface of the trench corresponds to a plane perpendicular to this carbon plane and allowing for slow oxidation rate. Hence, by performing a thermal oxidation process once, a thermal oxidation film can be formed such that the thickness of the thermal oxidation film on the side surface of the trench is greatly different from the thickness of the thermal oxidation film on the bottom surface of the trench.
According to the technique of the above-described patent publication, the gate insulating film on the trench is entirely formed by the thermal oxidation on the trench of the silicon carbide substrate. The silicon carbide substrate used here normally has a high crystallinity, so that a thin and flat gate insulating film can be formed. In this way, low threshold voltage can be attained. However, in the insulating film thus formed by the thermal oxidation of silicon carbide, carbon atoms, which have existed in the silicon carbide, remains to an extent that cannot be disregarded. According to a study conducted by the present inventors, the carbon atoms remaining in the gate oxide film decrease dielectric breakdown resistance of the gate insulating film. Accordingly, it is considered that there is room for further improvement for the dielectric breakdown resistance in the above-described conventional technique. Namely, it is considered that there is room for further increasing the breakdown voltage of the silicon carbide semiconductor device.